(1) Field of the Invention
The present invention relates to a semiconductor memory device including a noise canceller for a substrate bias voltage.
(2) Description of the Prior Art
According to the conventional technique, a bulk bias voltage is applied to a substrate from the outside in a semiconductor memory device, and since this voltage is stabilized by a capacitor or the like, any variation of the voltage is not caused by circuit operations in the memory device. Recently, a method in which a bulk bias voltage is generated on the substrate has been adopted in the art. In this method, since it is necessary to perform the operation with reduced power consumption, the current should inevitably be reduced and a high impedance cannot be avoided in a bulk bias voltage-generating circuit. Most of the circuit elements are connected to the substrate through capacitances such as PN junctions. Accordingly, when the memory circuit is actuated and voltages at respective parts are changed, noises are given to the substrate through such capacitances as PN junctions. Therefore, in the case where a bulk bias voltage is internally generated, this voltage is changed according to operations of the memory circuit. Furthermore, since a high impedance is maintained in the bulk bias voltage-generating circuit, variations of the bulk voltage by noises cannot be absorbed or compensated in the bulk bias voltage-generating circuit. For example, variations of 1 to 2 volts take place in a bulk bias voltage of 4 volts. Such variation of the bulk bias voltage often results in changes of the threshold voltage of a transistor or variations of voltages at respective parts through PN junctions or the like, and it often happens that the circuit operations become unstable and operation errors are caused.